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VHDL IIC
- vhdL 模拟IIC
DS1307_LCD.通过IIC总线读写实时时钟DS1307
- 通过IIC总线读写实时时钟DS1307，并把时、分、秒显示在12864液晶屏上，用的CycloneII EP2C8，Quartus环境,Through the IIC bus read and write real-time clock, DS1307, and the hours, minutes and seconds displayed on the LCD screen on the 12864, used CycloneII EP2C8, Quartus environment
i2c总线的vhdl实现和vxworks的文件系统.rar
- i2c总线的vhdl实现和vxworks的文件系统,i2c bus VHDL realization and VxWorks file system
iic.rar
- 基于I2C总线协议，该程序用VHDL编写了该协议的源代码，运行环境为ISE，modesim,Based on the I2C bus protocol, the procedures used to prepare the protocol VHDL source code, runtime environment for the ISE, modesim
iic_master
- it is a iic source verilog code with its testcase which can act only as master
iic
- 单片机和cpld通信中的用vhdl编写的cpld源程序代码-Cpld single-chip computer and communications cpld prepared using vhdl source code
I2C-Master-_-Slave-Core
- 用verilog 实现的 iic 总线编程，包括master，和slave的编程，很详细的iic总线编程-Iic-bus implemented using verilog programming, including the master, and slave programming, a very detailed iic-bus programming
IIC-CPLD
- iic总线协议～IIC总线通讯接口器件的CPLD实现，网上下载的资料～～很不错-IIC bus protocol ~ IIC bus communication interface device CPLD realization of downloading the information ~ ~ very good
EEPROM
- VHDL语言写的IIC实现EEPROM，很好的程序，已经用过，没有问题-Written in VHDL language IIC achieve EEPROM, good procedures are used, there is no problem
IIC
- 与外部设备进行成功连接的完整I2C程序。This example describes a synthesizable implementation of a I2C. -With external devices connected successfully complete I2C procedures. This example describes a synthesizable implementation of a I2C.
I2C
- IIC控制器的verilog实现，通过mcu接口对iic slave器件进行控制-IIC controller Verilog realize
i2c
- IIC 接口EEPROM 存取实验（verilog实现） 按动开发板键盘某个键 CPLD 将拨码开关的数据写入EEPROM 的某个地址，按动另 外一个键，将刚写入的数据读回CPLD，并在数码管上显示。帮助读者掌握I2C 的总线协 议和EEPROM 的读写方法。-verilog
I2C
- IIC通信协议IP核，描述IIC协议在FPGA上的实现-IIC communications protocol IP core
FPGA-IIC
- 在FPGA内，实现IIC数据接口。verilog源代码-In the FPGA, the realization of IIC data interfaces. verilog source code
IIC
- fpga实现的IIC通信的例程，注释很详细-fpga implementation of serial communication routines, comments in great detail
IIC
- IIC FPGA 代码 功能齐全 希望有需要的人下-IIC FPGA code is fully functional
IIC
- 用标准Verilog HDL 语言编写的IIC总线IP核，详细定义了时序及输入输出， 可以直接应用-Standard Verilog HDL language of the IIC bus IP core, a detailed definition of the timing and the input and output, can be applied directly
IIC
- 基于VERILOG HDL的IIC设计，比较基础，设计适合初学者-IIC INTERFCAE DESIGN
Verilog-IIC
- VerilogHDL语言编写的IIC 读写试验程序, 在Quartus II 8.1下面调试通过 -IIC VerilogHDL languages to read and write test procedures, the Quartus II 8.1 debugging through the following
IIC
- 利用程序实现IIC总线读写数码管显示,并通过开发板验证-Program for IIC bus read and write using digital display